Intel Newsroom

Incorrect. The best Intel chip you can get is Panther Lake which is made on Intel 18A node, available globally at the end of this month. Intel has already used EUV machines in Intel 7 and Intel 3 nodes, for the last few years. https://newsroom.intel.com/client-computing/ces-2026-intel-core-ultra-…

Intel has several issues but the biggest, IMHO, is that they are trying to reestablish their FAB (chipmaking) business. TMSC owns the FAB market and even Intel has them make their best chips because they aren’t currently competitive. Each new FAB costs $15-$20 billion so Intel has some large expenses and they are hemorrhaging money. Many don’t like the uncertainty because Intel might not succeed. My personal view is that the stock has been beaten down a lot and I’m optimistic they will succeed. They have a new CEO with a lot of industry knowledge. https://newsroom.intel.com/corporate/intel-appoints-lip-bu-tan-chief-e… Of course I could be completely wrong and Intel will be broken apart and sold for scraps in a few years. I believe at this price, I’ll still make money in the worst case scenario

> Also are there other benefits like integrating onto the main chip or something? Yes, but the iPhone chips may be tiled by the time this happens, so it might not be "on chip." This is probably for the best, as the RF analog stuff a modem chip has to deal with requires certain compromises. > Or other business benefits? Just getting away from Qualcomm is a big one, lol Apple isnt the only company they started a feud with. Intel accused them of being anticompetitive in a remarkable rant back in 2018: https://newsroom.intel.com/news/another-attempt-stifle-competition/

Recently intel compared their flagship mobile chip against AMD saying that they got the best single thread performance ever, using SPEC2017. They even had a SPEC graph showing all the AMD competitions, obviously M1 was not on there. And now SPEC is nowhere to be seen when compared to M1. Source: https://newsroom.intel.com/news/11th-gen-h35-processors-fastest-single…

Wayne Gretzky: "I skate to where the puck is going, not where it has been.” Intel Acquires Artificial Intelligence Chipmaker Habana Labs [1]: > Intel estimates the total addressable market (TAM) for AI silicon by 2024 will be greater than $25 billion, and within that, AI silicon in the data center is expected to be greater than $10 billion in the same timeframe. Amazon EC2 instances powered by Habana Gaudi [2]: > Up to 40% better price performance for deep learning models Matrix CPU math is another plausible future; Intel, AMD, and/or ARM are positioned to drive such an ISA extension. Accelerators, coprocessors, FPGAs, and CPU ISA extensions all seem to be in play; it is too early to pick winners in this nascent market. [1] https://newsroom.intel.com/news-releases/intel-ai-acquisition/ [2] https://aws.amazon.com/ec2/instance-types/habana-gaudi/

Slight reminder: - they have been saying this for a long time - they have also been saying that they won't have a 7nm untill 2021: https://newsroom.intel.com/news/2019-intel-investor-meeting/#gs.d3i14m It seemed that they had internal problems which caused the delays ( experienced people leaving). I think they got spooked by TSMC mentioning 3nm for 2023 with 19,x billion in investments. Samsung was also mentioning 5nm. I'll see it when I see it. Currently, I'm not convinced. Ps. Great timing for the financial results of AMD fyi. Guess when that is :p Also: yes, I believe in AMD ( = stocks), because they had great execution in a short timeframe the last years. It's amazing. For the rest, I'm curious to see what arguments will come here because of financial investments or because of being "true?" believers :p

Intel's own marketing talks about it being used by these kinds of people https://newsroom.intel.com/news/intel-core-i9-processor-comes-mobile-b…

Intel press release: https://newsroom.intel.com/news/intel-core-i9-processor-comes-mobile-b…

From the intel press release: >"As we bring these new products to market, ensuring that they deliver the performance improvements people expect from us is critical. Our goal is to offer not only the best performance, but also the best secure performance." https://newsroom.intel.com/editorials/advancing-security-silicon-level…

Intel has spoken, and for Spectre variant 1 they have said we need to fix it in software (they recommend inserting fences "in appropriate places"). https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/Intel-A…

Thing is, I don't see how the stuff from the article ties into their existing business. When I hear "IoT" or "self-driving car" or "Computer Vision" I think about ARM, Google, NVidia and a bunch other brands, but not Intel. It seems like they're trying to catch up to the leaders of several newly fashionable IT fields while simultaneously pivoting away from their core business. That's why it strongly reminds me of IBM and HP. Also, for the heck of it, compare the types of news you see on NVidia and Intel websites: http://nvidianews.nvidia.com/ https://newsroom.intel.com/ Side note: I'm surprised Intel isn't focusing all their effort on the emergence of VR. Proper VR requires a powerful PC, which is one of the areas of computing Intel still dominates (along with NVidia). If they bought Oculus...

All of the recent Atom brand chips for mobile deployment are SoCs. There's a CPU, a GPU and a shared memory package on the same silicone. Intel calls it a SoC themselves [1] [1]: http://newsroom.intel.com/community/intel_newsroom/blog/2012/01/10/int… Onstage was the world’s first public demonstration of the forthcoming 32nm Intel Atom SoC for tablets and hybrids running on Microsoft* Windows* 8, codenamed “Clover Trail.”

Intel, AMD etc at the same time they promised to kill the VGA port by 2015 also promised to kill LVDS by 2013: http://newsroom.intel.com/community/intel_newsroom/blog/2010/12/08/lea… And Intel followed up by removing LVDS from Haswell: http://www.tomshardware.com/reviews/core-i7-4770k-haswell-performance,…

> No one is ignoring the other half, the feud is rooted in Anthropic's insatiable desire for power and control over everyone and everything, including the administration. Again, this is ignoring half of it. See what they did to Intel prior: https://www.cnn.com/2025/08/07/business/intel-ceo-resign-trump "President Donald Trump on Thursday demanded the resignation of Intel CEO Lip-Bu Tan following reports and allegations that he has ties to China." https://www.cnbc.com/2025/08/11/intel-ceo-trump-lip-bu-tan.html "President Donald Trump said Monday that he and members of his cabinet met with Intel CEO Lip-Bu Tan, days after he called on the head of the chipmaker to resign. Intel shares rose 2% in extended trading." https://newsroom.intel.com/corporate/intel-and-trump-administration-re… "U.S. Government to make $8.9 billion investment in Intel common stock as company builds upon its more than $100 billion expansion of resilient semiconductor supply chain." Reminder: the American right went all the way to SCOTUS (successfully! https://en.wikipedia.org/wiki/Masterpiece_Cakeshop_v._Colorado_Civil_R… on the legal theory that businesses must have the right to decline customers they don't like.

Despite following this stuff some, I think I was about as confused to where they were. Did not realize most of the actual production was still at 4nm range. Apparently mostly Fab 34, Leixlip, Ireland (4nm, 3nm, Meteor Lake). Actually thought it was somewhere in Malaysia or America. "Normal" EUV manufacturing. [1][2] [1] https://newsroom.intel.com/de/intel-foundry/updates-intels-10-largest-… [2] https://en.wikipedia.org/wiki/List_of_Intel_manufacturing_sites Apparently, Fab 52 has started making stuff (1.8nm, High-NA EUV, Panther Lake), yet they're still in try-out and testing mode, and not really production. Working fab though. [3] [3] https://www.tomshardware.com/tech-industry/semiconductors/intels-fab-5… Wikipedia stuff listed looks kind of weird frankly. Seems like they send them all the way to Malaysia for packaging. Also, really severe difference between 22nm/14nm/10nm sites (9 different sites with at least one size, 4 with all three sizes) and 7nm/4nm/3nm/2nm/1.8nm/1.4nm. Nothing listed on 7nm, only 1 listed 4nm/3nm, 2nm got scrapped, only listing 1.8nm, and 1.4nm. They apparently moved a bunch of stuff around also to be more confusing. 10nm became Intel7 and 7nm became Intel4. [4] [4] https://en.wikipedia.org/wiki/7_nm_process#Expected_commercialization_…

Agreed. Change is coming! I feel like 5Gbit is mostly useful for switches, that a lot of other products are gonna jump direct to 10GBase-T. 25GBase-T or 40GBase-T is probably going to be a bit more energy intensive for a while, and 30m is ok but not great range if you're trying to span an office. Ideally I'd really like to see optics costs fall, for consumers to start picking it up. Maybe the future is SFP everywhere and perhaps that makes sense (swap out transciever if one fails! Direct Attach Copper maybe or Base-T for convenience). But I really hope we see some real inroads, some of this separation between consumer & commercial go away. I got a 150' 40Gbps fiber optic display port cable for ~$50, over half a decade ago. Unidirectional (I believe) but still just totally reset my expectations of what stuff really has to cost! Seemed too good to be true but still using it! We're spending more and more energy and effort trying to squeeze bits down a difficult copper channel, but optics right there, getting easier and easier. I wish Intel hadn't given up on on-package interconnects (available on package on Xeon & Phi, 2016-2019). High end at the time. But now PCIe, USB, and DisplayPort all have optical capable specs, and the energy cost and distance of copper keeps making less and less sense. We gotta go forward, and the break from scant tiny consumer bandwidth to something much different feels like a potential dam burst. I hope Intel's still doing some optical stuff…

Moore's 1965 paper was literally about "the complexity for minimum component costs" [1]. So you're right that transistors on a chip is more applicable then just die density. But as too often nowadays you left out the "minimum cost" aspect. Moore's law is not only about tech performance, it's about economics. Everybody knew the "minimum cost" part would fall the first, and it did. When the least cost offering improves, when things get better and cheaper, everyone follows. The lowering cost per function increases the addressable market, which can then sustain increasing investments. This is the virtuous cycle that moved the industry forward for a long time. When the economic part stops, when you can get more transistors but only at a higher cost, then the virtuous cycle stops. Technical progress do continue, but you will have less players at each new step: only those who can absorb the increasing costs will keep on playing at the leading edge. And production costs will still rise. If the market gets smaller due to increasing prices, and the production cost keep on raising, you will see a slow down as it will take more time to amortize investments. The big players are worried about this: slow down has in itself the specter of followers catching up (eventually...), leading to commoditization. We're definitely not there yet, but it's not a good perspective. Definitely bad for their stock. So the cost has been taken out. At first the NRE part was dropped of the equation, to…

what is exciting about Tiger Lake IMO is the memory tagging feature (ARM has it already) which can mitigate ROP attacks. It was announced here: https://newsroom.intel.com/wp-content/uploads/sites/11/2020/08/Intel-A… memory tagging is like a hardware based ASAN that eliminates many memory bugs and improves memory debugging. So its potential is well beyond mitigating ROP (though all these benchmarks will change with memory tagging enabled :-))). Intel patent document "US2020/0125502 Low memory overhead heap management for memory tagging", has more info on how this might work: https://www.freepatentsonline.com/20200125502.pdf For a great background primer on why to use this see the brilliant work of Konstantin Serebryany https://arxiv.org/ftp/arxiv/papers/1802/1802.09517.pdf IMO this is long overdue on Intel architecture and the main reason why one might want to be excited about Tiger Lake I can imagine it will lead to a lot of effort for Linux: malloc implementation, glibc, compilers, toolchains and debugging tools ... and lots of discussions about why and when it should be enabled. (IMO you want this in production always)

It's a magnificent piece of writing that chronicles a fantastic voyage. How did it come to be? > In 1983, Esquire commissioned journalist Tom Wolfe to write a piece on Robert Noyce for its anniversary issue, which would profile 50 Americans who had a profound and positive impact on American life during Esquire’s 50 years of existence. The magazine featured other famous writer-subject pairings, a piece by Kurt Vonnegut on Jackson Pollock and another by Norman Mailer on Jacqueline Kennedy Onassis. But Wolfe’s “The Tinkerings of Robert Noyce” would have a unique legacy. One historian called it “perhaps the most celebrated piece of journalism about Silicon Valley” and maintained more than 30 years after its publication that “it still stands as the most famous description of Intel and its singular corporate culture.” https://newsroom.intel.com/articles/intel-50-tom-wolfes-tinkerings-rob…

Possibly not a hoax. Intel published this today [0]: > Protecting our customers’ data and ensuring the security of our products are critical priorities for us. We routinely work closely with customers, partners, other chipmakers and researchers to understand and mitigate any issues that are identified, and part of this process involves reserving blocks of CVE numbers. We believe strongly in the value of coordinated disclosure and will share additional details on any potential issues as we finalize mitigations. As a best practice, we continue to encourage everyone to keep their systems up-to-date. Also, AnandTech seems to have picked up the story [1] half an hour ago, although it seems to rely on heise.de's report. [0]: https://newsroom.intel.com/articles/addressing-questions-regarding-add… [1]: https://www.anandtech.com/show/12712/spectre-watch-more-spectreclass-v…

I am actually working on this partially...I wouldn't call it new paradigms, but dataflow, probabilistic computing and parallel by default paradigms like VHDL or CUDA would be my best guess if the wildest dreams come true and we actually reroute physical chips to make new models. But only in the lower layers(similar to XDA abstracts stuff already for you on tensorflow). At the end, "all" I see happening in the near future will be * ISA extensions to have accelerators similar to the ones we have for Crypto/RNG and especially vectorization (crossbar matrix multipliers <3 ) * custom chips being made using the standard custom/semicustom design flows, just including memristive and maybe neuromorphic cells * maybe something akin to FPGA programming, especially since intel might be integrating their new Altera into consumer devices https://newsroom.intel.com/news-releases/intel-completes-acquisition-o…

Maybe it's just because this is a more technical update, but the responses from Intel[1] and AMD really seem like night and day to me. This page is for the most part clearly written and only has a minimal amount of BS before getting to the point about: • identifying the problems (without casting aspersions on other vendors or being FUD-y about issues that don't exist) • specifying what _specific_ hardware is vulnerable • info for developers (here's the patches you need if you're building your own kernel, here's a new compiler intrinsic that will be available soon for your applications, here [2] is code to implement the intrinsic yourself if you're not able to update your compiler) • slightly less useful info for end users (update your stuff, which isn't necessarily actionable advice for some of us on Android) • lets us know that future hardware may still require the KPTI patches, but it sounds like the speculative execution issues that aren't fixed by the patches ("variant 1") will be fixed in hardware Things that still aren't great: • no mention of performance impact of their various mitigation strategies that surely someone would have benchmarked in the 6 months they've been working on this. However I'm sure before too much longer someone will grab that code from their github and compare it to regular memory accesses • this FAQ purporting to be in layman's terms definitely isn't [3]. Imagine telling your elderly relative that saw an article about scary computer…

Sustaining 1TF on DGEMM was explicitly mentioned by Intel in the presentation/briefing. It's also mentioned in the press release: http://newsroom.intel.com/community/intel_newsroom/blog/2011/11/15/int… "The first presentation of the first silicon of “Knights Corner” co-processor showed that Intel architecture is capable of delivering more than 1 TFLOPs of double precision floating point performance (as measured by the Double-precision, General Matrix-Matrix multiplication benchmark -- DGEMM). This was the first demonstration of a single processing chip capable of achieving such a performance level." Does it mean much? It means something to me, and is a great first step for those of us running compute intensive codes. They really wouldn't get far if they designed the chip only around being able to do this. As I mentioned elsewhere in the thread, the article text is incorrect. The chip we're discussing is Knights Corner not Knights Ferry. The latter has been in early user hands for quite some time now and I've spent plenty of time hacking on it. Knights Corner is the new chip that is working it's way to production via the usual process with ship for revenue in 2012. The 2018 target is for an exascale machine, not shipment of initial MIC devices. TACC have already announced they'll be building out a 10 petaflop MIC based system next year to go operational by 2013. Yes, I'm comparing a chip that has…

Intel's published reliability data shows a ~0.4% annual failure rate of the X-25M: http://images.anandtech.com/reviews/storage/Intel/320/reliability.jpg They claim greater reliability for the new 320 series which is based on the same controller hardware, and have upped the warranty of that from 3 to 5 years: http://newsroom.intel.com/community/intel_newsroom/blog/2011/05/19/chi… There definitely has been a lot of noise about high failure rates in OCZ's Vertex series, but it doesn't seem to be anything inherent in SSDs or even the SandForce chipset. OCZ shipped SSDs with pre-release firmware, uses a number of different flash chip vendors, and may not test sufficiently prior to release. I'd say buying a reliable SSD is more difficult than buying a HDD since there are quite a few variables, but there is sufficient information available these days to make an informed choice. Performance is really worth it though! I wish there wasn't such a focus on boot times because I only have to reboot my MacBook Pro for certain OS updates or when it crashes, but high performance random IO makes a huge difference in day to day use. Applications launch almost instantly, I can do a find+grep on nested directories containing thousands of files in a fraction of a second, and compile times are pretty much only limited by CPU speed.

https://newsroom.intel.com/corporate/intel-and-trump-administration-re… It was going to be grants for various programs, but Intel wasn't meeting the requirements for those grants, so they renegotiated to sell stock instead of receiving the grants.

https://newsroom.intel.com/artificial-intelligence/intel-to-expand-ai-… Probably 160 GB for $4,000.

Apparently it’s been a thing for a while: What is an AI PC? ('Look, Ma! No Cloud!') An AI PC has a CPU, a GPU and an NPU, each with specific AI acceleration capabilities. An NPU, or neural processing unit, is a specialized accelerator that handles artificial intelligence (AI) and machine learning (ML) tasks right on your PC instead of sending data to be processed in the cloud. https://newsroom.intel.com/artificial-intelligence/what-is-an-ai-pc#gs…

Intel opened a packaging facility in New Mexico in January that’s supposed to their largest. https://newsroom.intel.com/intel-foundry/updates-intel-10-largest-cons…

Intel has announced that Intel 18A manufacturing will take place in Arizona. Salaries are a relatively small amount of the total costs of running a fab. https://newsroom.intel.com/client-computing/intel-unveils-panther-lake…

Intel press release: https://newsroom.intel.com/corporate/intel-and-trump-administration-re…