Agner Fog
agner.org · Personal blog · on HN since 2009
Agner Fog publishes CPU instruction tables and optimization manuals for C++ and assembly, covering Intel, AMD and VIA processors.
What HN saysCommenters hold up the plain-looking site as an example of some of the best content on the internet.
293HN people shared it
233linked it in comments
91stories submitted
4.7Kstory points
4 months agolast shared
2009people per year2026
Most-shared posts
- 1Software optimization resources for C++, assembly, Windows, Linux, BSD, Mac OS95 people · 548 points · first shared 2010 · 22 comments on HN
- 2List of latencies, throughputs and micro-operations for Intel, AMD, and VIA CPUs [pdf]60 people · 5 points · first shared 2012 · 1 comments on HN
- 3An optimization guide for assembly programmers and compiler makers (2018) [pdf]38 people · 650 points · first shared 2010 · 59 comments on HN
- 4Intel's "cripple AMD" function (2009)35 people · 587 points · first shared 2010 · 124 comments on HN
- 5Optimizing Software in C++ [pdf]16 people · 97 points · first shared 2011 · 11 comments on HN
- 6Calling conventions for different C++ compilers and operating systems9 people · 3 points · first shared 2012 · discussion on HN
- 7Test results for Broadwell and Skylake7 people · 92 points · first shared 2015 · 12 comments on HN
- 8Agner Fog6 people · 165 points · first shared 2018 · 35 comments on HN
- 9Test Results for AMD Ryzen6 people · 118 points · first shared 2017 · 8 comments on HN
- 10Stop the instruction set war6 people · 4 points · first shared 2009 · discussion on HN
- 11Surprising new feature in AMD Ryzen 30005 people · 411 points · first shared 2020 · 148 comments on HN
- 12Optimizing Assembly – Agner Fog [pdf]5 people · 29 points · first shared 2016 · 2 comments on HN
- 13Proposal for an ideal extensible instruction set4 people · 30 points · first shared 2015 · 13 comments on HN
- 14Intel's “Cripple AMD” Function (2019)3 people · 294 points · first shared 2022 · 108 comments on HN
- 15Agner Fog: Proposal for an open standard instruction set and its ecosystem [pdf]3 people · 14 points · first shared 2016 · discussion on HN
What HN people wrote when they linked it
klyrs · 2021-03-13
Some of the best content on the internet is "ugly." And by that, I mean specifically this site: https://www.agner.org/
fweimer · 2026-05-14
Sethi-Ullman register allocation reorders subexpression evaluation to achieve efficient register allocation: https://dl.acm.org/doi/10.1145/321607.321620
With modern register allocators and larger register sets, code generation impact from following source evaluation is of course lower than it used to be. Some CPUs can even involve stack slots in register renaming: https://www.agner.org/forum/viewtopic.php?t=41
On the other hand, even modern Scheme leaves evaluation order undefined. It's not just a C issue.
Aurornis · 2024-07-09
> Go ahead and cite the absolute best example you can come up from this incredible list of yours. The very top of your list will suffice to evaluate your whole list. I'll wait.
This could really do without the "incredible list of yours" and "I'll wait" snark. You don't need to be so condescending, but for the sake of helping others who are actually curious about the subject:
https://www.agner.org/optimize/ is a great place to start that I link to frequently.
It has significantly more breadth than the small collection of techniques in the paper linked in this post. It doesn't have the "HFT" buzzword attached, but then again the techniques in the linked paper above aren't unique to HFT either.
There are also several books on the subject, but given that the above link is a good place to start and the resources are freely available, that's where I'd recommend you look.
jcalvinowens · 2024-04-03
> either via function pointers or a switch/if?
> but would a modern CPU not be able to predict the path taken by a brach that tests the CPU features.
That's true, but the CPU has finite branch predictor state, and now you've wasted some of it. Indirect calls hurt too, especially in you need retpolines.
This is a great read: https://www.agner.org/optimize/microarchitecture.pdf
The Linux kernel has interfaces for doing the same thing, more explicitly than ifunc:
https://docs.kernel.org/next/staging/static-keys.html
https://lwn.net/Articles/815908/
vardump · 2024-03-07
It's great for hardware implementations, because it's simple and you get good/excellent accuracy. I wouldn't be surprised if that's still how modern x86-64 CPUs compute sin, cos, etc.
That said, last time I had to do that in software, I used Taylor series. Might not have been an optimal solution.
EDIT:
AMD's Zen 4 takes 50-200 cycles (latency) to compute sine. I think that strongly suggests AMD uses CORDIC. https://www.agner.org/optimize/instruction_tables.pdf page 130.
Same for Intel, Tiger Lake (Intel gen 11) has 60-120 cycles of latency. Page 353.
I'd guess usually ~50 cycles for Zen 4 (and ~60 for Intel) for float32, float64/float80 datatype. Denormals might also cost more cycles.
Jeaye · 2023-12-29
I'm hijacking a bit, but one thing I've been really wanting is some advanced optimization material for C++. There's so much that goes into data locality, branch elimination, faster ways to copy word-aligned data, and so on. I've picked up all I know on the fly, but would love some great resources which go deep into this. Is there something more instructive than Intel manuals?
Closest thing I found recently is this: https://agner.org/optimize/optimizing_cpp.pdf
tux3 · 2023-05-15
I don't have any good benchmark to link to off the top of my head, but I'll handwave in the general direction of Agner Fog's guide, which is accurate in my experience (and generally a great resource): https://www.agner.org/optimize/microarchitecture.pdf
From the multiple "Bottlenecks in AMD Zen" sections, a common point is
>The limiting fetch rate of up to 16 bytes per clock is a very likely bottleneck for CPU-
intensive code with large loops
Although admittedly, if your small hot loops fit in the uop cache that does largely mitigate the fetch/decode problem
sgarland · 2023-03-01
> Two cpu generations later, the Pentium comes out, and both mul and div take 1 clock cycle.
Where are you getting this information? Agner[0] lists DIV as taking 17 cycles at best (8-bit operand already in a register) on the P5, and MUL as taking 11 cycles. Even Tiger Lake takes 6 cycles for DIV.
There are ways [1] to beat that, but I don't think you can get it down to a single cycle.
[0]: https://www.agner.org/optimize/instruction_tables.pdf p.162
[1]: https://lemire.me/blog/2019/02/08/faster-remainders-when-the-divisor-i…
weird_user · 2023-02-17
The author's homepage[1] links to a few interesting topics too.
[1] https://www.agner.org/
irogers · 2023-02-15
Agner speaks about memory renaming back on Zen 2:
https://www.agner.org/forum/viewtopic.php?t=41
Intel Alderlake has performance events for tracking it:
https://github.com/intel/perfmon/blob/974c69919b2a9dfd8278cfe3384d2ae8…
But even before this you had store to load forwarding on x86. I'm not saying you have, but before inventing a performance problem it is worth spending time trying to diagnose it with thorough profiling (e.g. [1]). The Fedora frame pointer patch did a thorough performance analysis and performance will be revisited again. Unfortunately there are a lot of arm chair performance experts who haven't spent time looking into the details.
[1] https://perf.wiki.kernel.org/index.php/Top-Down_Analysis
smoldesu · 2022-09-24
Like other comments said, there are a lot of factors that go into determining the performance of a clock cycle. One of the more interesting fields here is the optimization of instructions themselves - Agner Fog has a great document[0] comparing the performance of common x86 instructions across multiple CPU generations. It becomes really easy to see how great the early Ryzen chips were despite their low clock speeds.
[0] https://www.agner.org/optimize/instruction_tables.pdf
nonplus · 2022-04-06
I would love to see a 2022 follow-up from Agner Fog on this. He has work on C++ compilers as recently as 2021 so I'm sure he has recent real world info on the topic.
https://www.agner.org/optimize/#manuals
shoo · 2021-12-04
> recommend a good book or other resource about modern code optimization
https://www.agner.org/optimize/
loxias · 2021-10-04
Reading Agner Fog's writings has taken my optimization to a whole new level.
https://www.agner.org/
fsloth · 2021-05-27
Sorry, nothing else in this genre comes to mind. There is always Agner Fog's optimization resources which are mind blowingly awesome if you worry about the performance of your C or C++ code like I do - his site is in https://www.agner.org/ and the optimization manuals are in https://www.agner.org/optimize/#manuals (I suggest starting from optimizing_cpp.pdf)
DyslexicAtheist · 2021-01-19
(as you might be able to tell) this is of great interest to me so if you have any reading recommendations I'd appreciate them (thanks).
some of the people (other than Scott) who influenced my thinking on this would be:
Berger: https://en.wikipedia.org/wiki/Peter_L._Berger (especially http://perflensburg.se/Berger%20social-construction-of-reality.pdf)
Jacques Ellul https://archive.org/details/JacquesEllulTheTechnologicalSociety (also Propaganda)
and Nassim Taleb (e.g. his view on Switzerland) ...
also I'm admittedly thin on anthropological reading (still have Agner Fog's book on my list since ages: https://www.agner.org/cultsel/warlike_peaceful.pdf)
Tuna-Fish · 2020-08-28
The best resource for details of any specific x86 cpu is Agner Fog's 3rd manual at: https://www.agner.org/optimize/#manuals
whereistimbo · 2020-08-28
Another great thread from the same author: https://www.agner.org/forum/viewtopic.php?f=1&t=6
BeeOnRope · 2019-12-08
Your argument might be worth considering if Intel didn't use the same "cripple AMD" check across a lot of other libraries and their own compiler too - where there are no such "numerical approximation" concerns.
They've been doing it long before MKL [1].
---
[1] https://www.agner.org/optimize/blog/read.php?i=49
nkurz · 2019-05-03
Agner Fog's optimization guide is worth a very close reading:
https://www.agner.org/optimize/microarchitecture.pdf
If you want smaller chunks, Denis Bakhvalov is starting to hit his stride with a nice series of blog posts: https://easyperf.net/notes/
If that's not enough, Ingve (who submitted this) has made literally thousands of submissions, and a surprising number are excellent articles on optimization: https://news.ycombinator.com/submitted?id=ingve
rolph · 2019-02-09
these guys are really into x86 assembly programming and win system programming:
http://masm32.com/board/index.php?PHPSESSID=2cdfa8b26fb4f6b96d1aa6cbd2…
and they have a toolset and kit on thier frontend landing page:
http://masm32.com/
they are not into hax or reveng stuff and are seriously averse to please do my homework for me requests but the old timers know thier stuff.
agner is a good place as well for inspiration:
https://agner.org/
salicideblock · 2018-08-26
Indeed. The instruction latency tables in particular [1] are great as a quick reference when considering the cost of each instruction.
[1] https://www.agner.org/optimize/instruction_tables.pdf
pjc50 · 2018-06-25
There are a lot of instances in a design, both macro and micro, where you can trade off greater performance at the expense of something else - either area or power or both.
Then these tradeoffs tend to multiply each other. If you have a design which is fast on branch-predicted and slow on branch-mispredicted, and you build a big branch predictor, it works well. But you're committed to powering all that.
I mean, compare http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388f/C… (few sentences) with http://www.agner.org/optimize/microarchitecture.pdf (admittedly a lot more detail, but it's clearly a more complicated system too)
paulsutter · 2018-01-02
I recommend Agner Fog’s Vector Class Library instead
http://www.agner.org/optimize/vectorclass.pdf
mrb · 2017-03-02
Intel provides a lot of tools and SDKs for game developers. I presume some/many are specifically optimized and highly-tuned for running best on Intel processors:
https://software.intel.com/en-us/gamedev/
But also things like physics engines (eg. Havok, which was acquired by Intel and heavily optimized for Intel processors), etc.
And of course Intel's C Compiler is known to cripple AMD:
http://www.agner.org/optimize/blog/read.php?i=49 And some/many games are compiled with ICC...
wolfgke · 2016-11-28
What I also find rather interesting is the concept of macro-op fusion that Intel introduced with the Core 2 processors: This means for example that a cmp ... (or test ...) followed by a conditional jump can/will be fused together to a single micro-op. In other words: Suddenly a sequence of two instruction maps to one internal micro-op. If you are interested in the details, read section 8.5 in http://www.agner.org/optimize/microarchitecture.pdf
trsohmers · 2016-11-11
While this is a pretty decent overview, it is not very precise, and even a bit misleading in certain cases. Depending on where certain instructions are in the execution pipeline, you can. R limited in what can be issued and executed, and the latencies are not deterministic. This is one of the biggest difficulties in optimizing scheduling in a complex architecture such as x86, and gets even worse (determinism wise) when you throw in cache misses and branch prediction.
For a more exhaustive instruction latency listing over a variety of micro architectures, check out [0]. [1] is also a great resource for memory latencies for a variety of processors.
[0]: http://www.agner.org/optimize/instruction_tables.pdf
[1]: http://www.7-cpu.com
paulmd · 2016-08-18
I very much recommend Agner Fog's Microarchitecture. It's a rather ponderous tome, but it is quite simply the definitive resource on the actual design and performance of real-world x86 CPUs.
It does have a brief introduction on some of the basic execution fundamentals but then it jumps right in, so you will probably need some external introduction if you are not generally familiar with the topic.
http://www.agner.org/optimize/microarchitecture.pdf
lossolo · 2016-05-30
For anyone interested in optimizing C++ i recommend Agner blog.
http://www.agner.org/optimize/optimizing_cpp.pdf
EDIT: typo
rinon · 2016-01-13
Indeed, it's a reference work. I've read through the first volume cover to cover, but that's probably not the best way to use TAOCP. When you're interested in a particular algorithm or topic, go find it and read that section.
If you're interested in modern architecture details, I'd recommend Agner Fog's marvelous reference books (http://www.agner.org/optimize/).