The Chip Letter

“ Direct Page Register One of the things that had made the 6502 so successful, was its extensive use of ‘zero page’, or memory locations 0 to 255. With a very limited number of registers, the 6502 relied on the use of ‘zero page’ to access frequently used values. Access to these values was faster as only a single address byte was needed to specify the address. The 6809 enhanced the use of the zero page by adding a new 8-bit ‘Direct Page’ register which allowed the ‘zero page’ to be moved to anywhere in the 16-bit address space.” From https://thechipletter.substack.com/p/motorolas-6809-the-best-8-bit

That's a slightly roundabout way of saying that Arm built the best microprocessor design for the fast growing mobile market. A design that was a factor in Nokia getting to No. 1 in the handset market. The 'happened' on power consumption is true on day 1 in 1985, but the Arm team continued to keep power consumption low and added features, such as Thumb, that won Nokia and others over. Shameless self plug for more on this stage of the Arm story: https://thechipletter.substack.com/p/the-arm-story-part-3-creating-a-g…

I love it. I have noted this article for my talk about how CPUs are free. To appreciate that, you have to understand that when the first microcomputers came out engineers were still in "compute" mode[1], we were lectured that you wouldn't use a hard coded loop to check for a switch closure, you had to use interrupts because otherwise you were wasting all those CPU clocks. And computing at the time was often billed in weird units like "kilocoreseconds" (which is the number of seconds * the number of 1024 word pages of core (RAM)) that were consumed when your program ran. The logical extreme end of Moore's law was that you could put a CPU into a very, very small amount of silicon and that meant they were essentially free. (Chips cost by die area & layers). Another article like this is Bunnie Huang's discussion of the ARM CPU in flash chips[2]. There have always been jokes that it is cheaper/easier to use an 8 pin uController than it is to use a 555 timer, and the argument has often come down to the current and voltage ranges that a 555 can work under are different, but at some point I expect to finally see the "blending" of analog/digital chips that allow for a wide range of voltages (on board switching PMIC), and analog pins that have few if any compromises for being either digital or analog. [1] The Chip Letter -- https://thechipletter.substack.com/p/tiny-computers-from-texas [2] On Hacking MicroSD Cards -- https://www.bunniestudios.com/blog/?p=3554

Older Intel CPUs were already using microcode. Intel went after NEC with a copyright case over 8086 microcode, and after AMD with a copyright case over 287/386/486 microcode: - https://thechipletter.substack.com/p/intel-vs-nec-the-case-of-the-v20s - https://www.upi.com/Archives/1994/03/10/Jury-backs-AMD-in-dispute-with… I would totally believe the FDIV bug is why Intel went to a patchable microcode architecture however. See “Intel P6 Microcode Can Be Patched — Intel Discloses Details of Download Mechanism for Fixing CPU Bugs (1997)” https://news.ycombinator.com/item?id=35934367

Before they decided on PowerPC, they had a failed attempt at building their own RISC CPU: https://thechipletter.substack.com/p/the-first-apple-silicon-the-aquar… https://archive.org/details/scorpius_architecture

I remember reading about that, from the Chipletter in 2022[0]: "The XT/370, with a hard drive, could be purchased for as little as $8085. This compares with a basic PC/XT with 256K RAM for $4395 and adds a lot more functionality." ... "So what was the PC XT/370? Put simply, it was a PC XT (the original IBM PC with a hard disk drive) with three additional cards: PC/370-P : A card with one modified 68000, one standard 68000 and lots of logic chips. PC/370-M : A card with 512 kilobytes of memory. PC/370 EM: Providing the ability to emulate an IBM 3270 terminal. The XT/370 then became three machines in one: An IBM PC/XT. An IBM 3270 terminal that could be used to access a System/370 mainframe. A machine capable of running some System/370 software." [0] https://thechipletter.substack.com/p/motorola-intel-ibm-make-a-mainfra…

Mentioned? He was a designer on the 68000, the system 370, and the micro system/370, which (gasp) used 68000 chips. ( "Heavily microcode modified. Heavily.) Now, I do not know about the transition from the 370 on a chip to the XT/370. https://thechipletter.substack.com/p/motorola-intel-ibm-make-a-mainfra…

This reminds me of this article[1] recently linked on HN, talking about how Intel had an analog chip for neural nets in the 90s, if I understood correctly [1] https://thechipletter.substack.com/p/john-c-dvorak-on-intels-first-neu…

(Not so) Secret project Aquarius was their first attempt to create their own chip: https://thechipletter.substack.com/p/the-first-apple-silicon-the-aquar… Retrobytes has a very entertaining video about the whole story: https://www.youtube.com/watch?v=v7dNorB47Qw

Thanks, that was an incredible story and much more detail than I had seen elsewhere. The whole series is a goldmine. Eg. I never knew that the registers in the 4004 were dynamic (ie. a cap + 1 transistor) [1]! [1] https://thechipletter.substack.com/p/the-strangeness-of-the-intel-4004

>If anything it has lot of mountains to climb before it can be considered a challenge to the existing instruction set. That's not what ARM thinks[0]. >There is nothing inevitable about RISC V. As it turns out, the decisions have long been made, and RISC-V has been chosen. 0. https://thechipletter.substack.com/p/risc-v-part-2-ambitious-aims

For more of the story behind the development of the iAPX 432, check out "iAPX432 : Gordon Moore, Risk and Intel’s Super-CISC failure": https://thechipletter.substack.com/p/iapx432-gordon-moore-risk-and-int… https://news.ycombinator.com/item?id=35412342

FTA: “Canon’s nanoimprint lithography — a technology under development for more than 15 years but which the company says is only now commercially viable — stamps chip designs on to silicon wafers rather than etching them using light.” It seems everything old is new again. https://thechipletter.substack.com/p/leaving-arizona: “there was a reason the 6800 was expensive. It was made using ‘contact lithography’, where the photomask, containing the image that is to created on the silicon die, comes into direct contact with the silicon wafer. This inevitably led, over time, to damage to the photomask, reducing yields and eventually rendering the expensive photomask unusable. Making a low-cost version of the 6800 would be impossible without a more cost-effective manufacturing process.” Reading https://en.wikipedia.org/wiki/Contact_lithography and https://en.wikipedia.org/wiki/Nanoimprint_lithography, that problem doesn’t seem to have been solved, but of course, it’s possible that the lower cost more than compensates for it.