e-basteln

There are usb-c paper tape readers: https://www.e-basteln.de/computing/papertape/overview/ They even work with phones!

This 10MHz cousin of the 65C816 is much less fun than the 100MHz 6502! https://www.e-basteln.de/computing/65f02/65f02/

"First rolling-ball mouse" https://en.wikipedia.org/wiki/Computer_mouse#Rollkugel https://www.e-basteln.de/computing/rollkugel/rollkugel/ Engelbarts mouse didn't have a ball.

This person appears to have made an FPGA version: http://www.e-basteln.de/computing/rpc4000/rpc4000/

The Super Nintendo contains a 65816 core, so of course the 6502 is doable on an FPGA. Here’s a “100 MHz 6502”: http://www.e-basteln.de/computing/65f02/65f02/

It's pretty common to bake 8051 MCU cores into ASICs. They'll run several hundred Mhz. It seems kind of like lawnmower racing. You can get a 100Mhz FPGA based 6502. http://www.e-basteln.de/computing/65f02/65f02/ Since FPGAs are significantly slower than ASICs, it seems like a 1Ghz 6502 wouldn't be unreasonable. The problem is, what would you do with it? The CPU would be severely bottlenecked by its peripheral interfaces.

Interesting. I know some have tried to make faster versions of old 8 bit computers from the hardware side instead. Here's an FPGA-based drop-in replacement for 65C02 that runs at 100MHz: http://www.e-basteln.de/computing/65f02/65f02/ Not tried in a C64 yet, but he did get it working in a Commodore PET.

Because it’s easy to ‘cache’ the entire memory of the host system, it’s better described as a new computer that only slows down to access the memory locations that affect I/O (video, audio, keyboard, I/O ports, etc.) https://www.e-basteln.de/computing/65f02/65f02/: “The idea is to use this as a “universal” accelerator for 6502 and 65C02-based host computers – just plug it into the CPU socket. The only thing the FPGA board needs to know about its host is the memory map: Where does the host have memory-mapped I/O? Up to 16 different memory maps can be stored in the FPGA, and selected via a mini DIP switch. Upon power-on, the 65F02 grabs the complete RAM and ROM content from the host and copies it into the on-chip RAM, except for the I/O area. Then the CPU gets going, using the internal memory at 100 MHz for all bus accesses except for any I/O addresses – for these, the internal CPU pauses, and an external bus cycle is started at whatever the external clock speed is.”

Similar project: http://e-basteln.de/other/stm/overview/

Lol :) Interestingly that same site hosts a project related to the topic of emulated 6502, but not cycle accurate, instead 100Mhz in old Spartan-6 FPGA. Unfortunately not 6510, so no plugin for the 'breadbox': https://www.e-basteln.de/computing/65f02/65f02/ & https://hackaday.com/2021/10/15/heres-a-100-mhz-pin-compatible-6502-re… But! This reminded me of something else: Micro Core Labs! Which can either be cycle accurate, or superfast: https://microcorelabs.wordpress.com/2021/03/14/mcl64-commodore-64-acce… https://microcorelabs.wordpress.com/2021/04/16/mcl64-mos-6510-emulator… https://microcorelabs.wordpress.com/2021/04/19/mcl64-worlds-fastest-co… https://microcorelabs.wordpress.com/2021/11/22/commodore-64-tester-usi… https://microcorelabs.wordpress.com/2021/11/29/mcl64-update/ Imagine Durex Forth on that. Ze PoWerRrRr!1!!