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CHERIoT Blog
cheriot.org · Company blog · on HN since 2023
The CHERIoT project blog covers CHERI hardware memory-safety capabilities for embedded devices, including its RTOS, silicon, and security design.
What HN saysCommenters link it to explain what CHERI is and to answer whether safe languages make it unnecessary, using its "CHERI Myths" post.
16HN people shared it
5linked it in comments
28stories submitted
323story points
3 months agolast shared
2023people per year2026
Most-shared posts
- 1CHERI Myths: I don't need CHERI if I have safe languages5 people · 7 points · first shared 2024 · discussion on HN
- 2Moving CHERIoT RTOS to a tickless model2 people · 83 points · first shared 2024 · 18 comments on HN
- 3CHERIoT 1.0 Released2 people · 7 points · first shared 2025 · discussion on HN
- 4Formally verifying security properties of CHERI processors2 people · 7 points · first shared 2024 · discussion on HN
- 5CHERIoT and Supply Chain Security2 people · 4 points · first shared 2024 · discussion on HN
- 6First CHERIoT Silicon2 people · 3 points · first shared 2026 · discussion on HN
- 7Sealed Types2 people · 3 points · first shared 2025 · discussion on HN
- 8Compartmentalising Network Stacks with CHERIoT2 people · 3 points · first shared 2024 · discussion on HN
- 9CHERIoT: Complete Memory Safety for Embedded Devices [pdf]2 people · 1 points · first shared 2023 · discussion on HN
- 10How to talk to your parents about hardware memory safety1 people · 112 points · first shared 2024 · 40 comments on HN
- 11Why did you write a new RTOS for CHERIoT?1 people · 58 points · first shared 2024 · 17 comments on HN
- 12CHERIoT: The Last Ten Years1 people · 22 points · first shared 2025 · 1 comments on HN
- 13Post-Quantum Cryptography on CHERIoT1 people · 3 points · first shared 2025 · discussion on HN
- 14Simplifying a key-value service using CHERIoT1 people · 2 points · first shared 2024 · discussion on HN
- 15Sentries for Control-Flow Integrity1 people · 2 points · first shared 2024 · discussion on HN
What HN people wrote when they linked it
gnufx · 2024-08-28
I wonder why emulators aren't interesting for a hobbyist. However, there are FPGA implementations [1], and micro-controller-type systems on FPGA available commercially [2].
[3] has a list of publications for the rigorous engineering agenda.
1. https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/cheri-risc-v.ht…
2. https://cheriot.org/
3. https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/cheri-formal.ht…
GranPC · 2026-01-04
For those wondering what CHERI is: https://cheriot.org/cheri/philosophy/isa/2025/11/19/cheri-or-cheriot.h…
Wretched_Bstard · 2024-10-25
CHERIoT somewhat anticipated this perspective.
https://cheriot.org/cheri/myths/2024/08/28/cheri-myths-safe-languages.…
nwf · 2024-08-29
> it doesn't matter too much whether the emulator is CHERI or not since Rust itself lets me express memory safety in the type system
You might be interested in a very timely blog post: https://cheriot.org/cheri/myths/2024/08/28/cheri-myths-safe-languages.…
kwitaszczyk · 2024-04-19
The CHERI ISA does not provide temporal safety features but it allows building temporal safety mechanisms in software. CheriBSD 23.11 includes user-space heap temporal memory safety that is enabled by default [0]. The paper "Cornucopia Reloaded: Load Barriers for CHERI Heap Temporal Safety" at ASPLOS 2024 will describe the current implementation [1].
For embedded systems, the CHERIoT [2] platform implements hardware-assisted temporal memory safety without MMU.
[0] https://ctsrd-cheri.github.io/cheribsd-getting-started/features/tempor…
[1] https://www.asplos-conference.org/asplos2024/main-program/abstracts/#5…
[2] https://cheriot.org/papers/2023-micro-cheriot-uarch.pdf